Topic Menu

Cyber-chess a chess instruction site

The 'NAND' gate

For the output Y to be low (a logic state 0) both input A AND input B needs to be high. This is the reverse of the outcome of the AND gate.

If you know the truth table for the AND gate you can simply negate the outputs and get a truth table for the NAND gate.

The truth table below shows that this is the case:

A
B
Y
0
0
1
0
1

1
1
0
1
1
1
0

 

Boolean Expression for the NAND gate:

The overscore - a line over the top of the letter - indicates an inverse state (a 0 becomes 1 and vice versa).

The NAND gate (and the NOR gate) are said to be universal gates because combinations of them can be used to produce a NOT gate, an OR gate or an AND gate. Non-inverting gates do not have this versatility because they cannot produce an inverted state.